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Sunday, October 2, 2016

TSV MEOL Process


Backside processing done at the OSAT on TSV wafers that involves TSV reveal & RDL/C4 interconnect processing, used in 2.5D/3D TSV package integration is commonly termed as MEOL. This involves wafer support system (WSS) for thin wafer handling/management (bonding/debonding), wafer thinning (Si-etch), TSV reveal & CMP, passivation (CVD), backside RDL, & back/front side bumping.

Larger body sizes implemented as FCxGA 2.5D TSV, while smaller body sizes are targeted for FCCSP 3D TSV.
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