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Sunday, October 22, 2017
Server Processor IP / Macro Blocks
DDR, PCIE, L3 cache, SATA, USB, GPIO, PLL, SGMII, SERDES, APC/CBF, SRAM, UCI, PHY
Monday, October 16, 2017
SI / PI
PDN. Crosstalk. Parasitics. Latency. Bandwidth. EMI/EMC. RC delay. Resistance, Capacitance, Inductance, Impedance.
Droop, insertion loss, return loss, impedance matching, jitter, rise time, transmission line effects, eye diagram (eye ht ->mv, eye width->ps), leakage, transmission loss
Thursday, April 20, 2017
Conflict Resolution
Turtle : Avoid
Bear: Accommodate
Shark: Compete
Fox: Compromise
Owl: Collaborate
Saturday, April 15, 2017
Friday, April 14, 2017
Covey's Time Management Matrix
High Importance, High Urgency: PREVENT
Low Importance, Low Urgency: AVOID
High Importance, Low Urgency: PLAN
Low Importance, High Urgency: MANAGE
Friday, April 7, 2017
Project Management Fundamentals
Needs: RFI/RFP/SOW
Solution/Plan Definition: Charter (Goals, Objectives, Team, Stakeholders, Sponsors, Deliverables, Decisions, Risks, Assumptions) & WBS (defines Scope, Schedule/Time, Budget), Resources (allocation/assignment/leveling/balancing), Duration estimates/Dependencies (FS, SS, FF, SF), AON/Critical Path, Gantt Chart
Execute / Perform: Manage, track (variance to baselines, progress status, corrective action), control (PERT/CPM/EVMS), report, review.
Close-out. Document. Lessons Learned.
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Smartphone Components
Antenna + Switch & RFFE, Filter, Duplexer, Amplifier, Transceiver, Baseband, Application Processor [SOC + LPDDR3], Memory [Flash / SSD...
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Molded Embedded Packages seek to overcome warpage concerns and limitations in z-height that conventional PoP type packages suffer from, w...
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AQL = definition of a threshold good lot. LTPD = definition of a threshold bad lot. The sampling plan is designed around the AQL/L...
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L-Gate: Technology/Product Development L-1: Explore / PC1 L 0: Define / PC2 & T/O L 1: Enable/BKM determination L 2: Implement/BK...


